Rambus Inc. was on the wrong end of a Federal Circuit decision recently when the CAFC, per Chief Judge Rader, upheld the decision of the Board of Patent Appeals and Interferences in a reexamination in which claim 18 of Rambus’s U.S. Patent No. 6,034,918 was found invalid as anticipated. See In re Rambus, Inc. The ‘918 patent relates to a method of controlling a memory device is disclosed wherein the memory device includes a plurality of memory cells.
Judge Rader, writing for a unanimous majority that also included Judge Linn and Judge Dyk, concluded that substantial evidence supported the PTO’s determination that claim 18 reads on the “memory module” in the prior art.
Claim 18 of the ’918 Patent, at issue in this appeal, reads as follows:
A method of operation of a synchronous memory device, wherein the memory device includes a plurality of memory cells, the method of operation of the memory device comprises:
receiving an external clock signal;
receiving first block size information from a bus controller, wherein the first block size information defines a first amount of data to be output by the memory device onto a bus in response to a read request;
receiving a first request from the bus controller; and
outputting the first amount of data corresponding to the first block size information, in response to the first read request, onto the bus synchronously with respect to the external clock signal.
On appeal, the PTO argued that the Board correctly focused its analysis on construction of the term “memory device” in claim 18 of the ’918 Patent and appropriately affirmed the examiner’s rejection based on a construction of this term as meaning a “device,” which is defined to allow “for the electronic storage and retrieval of information.” The PTO argues that the Board supported these constructions by relying on the specification’s description of a memory stick embodiment, the prosecution history, expert testimony, and language in Rambus’s other patents.
Rambus, on the other hand, argued that the Board erred because a “memory device” has two relevant limitations: (1) it is a single chip component and (2) it does not have a memory controller. Rambus disputes the examiner’s and Board’s construction because the Board considered each word individually and then construed the phrase to cover “multiple electronic appliances grouped together, that allow[] information to be stored and retrieved.” According to Rambus, this construction makes no sense in the context of the ’918 Patent. Instead, Rambus would define the term “memory device” as necessarily consisting of only one chip with no control function, and would not have defined the term by what its two component words individually mean.
First, the CAFC determined that the Board properly interpreted the specification as to Ramubs’ first claim. Chief Judge Rader explained that the specification did not restrict the invention to single chip memory devices because there were “no words of manifest exclusion or clear disavowals of multichip devices—there are only preferred embodiments and goals of the invention that Rambus argues are better met by single chip devices.”
On the second Ramubs contention, Chief Judge Rader explained that Rambus’ argument must fail because “claim 18 itself does not limit any ‘control’ function that the memory device might carry out.” Moreover, the opinion goes on to explain: “Nothing in the claim prevents the memory device from consisting of a storage chip and a device that facilitates the receiving and out-putting from that storage chip. And at oral argument Rambus conceded that the memory device must at minimum have such control logic.”
Thus, the Federal Circuit affirmed the Board’s rejection of claim 18 of the ’918 Patent as anticipated.
Tags: CAFC, Federal Circuit, memory, method, Rambus, synchronous memory device, USPTO
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